The gm/ID Methodology, a sizing tool for low-voltage analog CMOS Circuits
Produktnummer:
1892eb64a21c6d44edb451344993af8dd9
| Autor: | Jespers, Paul |
|---|---|
| Themengebiete: | CMOS ROM Transistor integrated circuit large signal compact models low-voltage, low-power analog CMOS circuits micro-alloy transistor parameter acquisition sizing methodology static-induction transistor |
| Veröffentlichungsdatum: | 04.12.2009 |
| EAN: | 9780387471006 |
| Sprache: | Englisch |
| Seitenzahl: | 171 |
| Produktart: | Gebunden |
| Verlag: | Springer US |
| Untertitel: | The semi-empirical and compact model approaches |
Produktinformationen "The gm/ID Methodology, a sizing tool for low-voltage analog CMOS Circuits"
This book provides a comprehensive overview of design methodologies for Analog Circuits, and includes a MATLAB dedicated toolbox. The MATLAB toolbox offers the possibility of performing virtual hands-on experiments related to MOS transistor physics as well as finding currents and transistor sizes for well-known CMOS circuits. The book’s objective is to suggest straightforward methodologies at the earliest possible design stage and find currents and sizes very close to optimality. The methodology takes advantage of compact MOS models while following classical design procedures. This is also the first 'book' to present the gm/ID synthesis methodology to which an increasing number of papers refer. Finally, the users’ guide, described in the annex, should enable the reader to run their own tests.
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