Timing Optimization Through Clock Skew Scheduling
Produktnummer:
1853ccc03434da408d80e0d90375737ad3
| Autor: | Friedman, Eby G. Kourtev, Ivan S. Taskin, Baris |
|---|---|
| Themengebiete: | Circuit Timing Clock Skew Scheduling Clock Timing Computer EDA Optimization Placement Methodologies Signal VLSI VLSI CAD |
| Veröffentlichungsdatum: | 04.11.2010 |
| EAN: | 9781441943774 |
| Sprache: | Englisch |
| Seitenzahl: | 266 |
| Produktart: | Kartoniert / Broschiert |
| Verlag: | Springer US |
Produktinformationen "Timing Optimization Through Clock Skew Scheduling"
The focus of this book is on timing analysis and optimization techniques for circuits with level-sensitive memory elements (registers). Level-sensitive registers are becoming significantly more popular in practice as integrated circuit densities are increasing and the ‘performance-per-power’ metric for integrated circuits becomes a key issue. Therefore, techniques for understanding level-sensitive based circuits and for optimizing the performance of such circuits are increasingly important. The book contains a linear programming formulation applicable to the timing analysis of large scale circuits. It includes a delay insertion methodology, and offers an overview of circuit partitioning, placement, and synchronization methodologies that enables the implementation of high speed, low power circuits synchronized with ultra-modern resonant clocking technology.
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