SoC Physical Design
Produktnummer:
18cbbaec68ba854bd4b949ee04df2a531a
| Autor: | Chakravarthi, Veena S. Koteshwar, Shivananda R. |
|---|---|
| Themengebiete: | Analog Chip Design Clock Tree Synthesis Fabless Manufacturing Microchips SOC Design Standard Cell Library Tape Out Unified Power Format (UPF) Flow VLSI Floor Plan and Placement VLSI Physical Design |
| Veröffentlichungsdatum: | 06.06.2022 |
| EAN: | 9783030981129 |
| Sprache: | Englisch |
| Seitenzahl: | 155 |
| Produktart: | Unbekannt |
| Verlag: | Springer International Publishing |
| Untertitel: | A Comprehensive Guide |
Produktinformationen "SoC Physical Design"
SoC Physical Design is a comprehensive practical guide for VLSI designers that thoroughly examines and explains the practical physical design flow of system on chip (SoC). The book covers the rationale behind making design decisions on power, performance, and area (PPA) goals for SoC and explains the required design environment algorithms, design flows, constraints, handoff procedures, and design infrastructure requirements in achieving them. The book reveals challenges likely to be faced at each design process and ways to address them in practical design environments. Advanced topics on 3D ICs, EDA trends, and SOC trends are discussed in later chapters. Coverage also includes advanced physical design techniques followed for deep submicron SOC designs. The book provides aspiring VLSI designers, practicing design engineers, and electrical engineering students with a solid background on the complex physical design requirements of SoCs which are required to contribute effectively in design roles.
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