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Hardware Acceleration of EDA Algorithms

106,99 €*

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Produktnummer: 18d4ac91cc797341318117c909b94ae0ce
Autor: Gulati, Kanupriya Khatri, Sunil P
Themengebiete: FPGA Field Programmable Gate Array algorithms architecture computer-aided design (CAD) integrated circuit micro-alloy transistor, MAT model simulation static-induction transistor
Veröffentlichungsdatum: 06.04.2010
EAN: 9781441909435
Sprache: Englisch
Seitenzahl: 192
Produktart: Gebunden
Verlag: Springer US
Untertitel: Custom ICs, FPGAs and GPUs
Produktinformationen "Hardware Acceleration of EDA Algorithms"
Single-threaded software applications have ceased to see signi?cant gains in p- formance on a general-purpose CPU, even with further scaling in very large scale integration (VLSI) technology. This is a signi?cant problem for electronic design automation (EDA) applications, since the design complexity of VLSI integrated circuits (ICs) is continuously growing. In this research monograph, we evaluate custom ICs, ?eld-programmable gate arrays (FPGAs), and graphics processors as platforms for accelerating EDA algorithms, instead of the general-purpose sing- threaded CPU. We study applications which are used in key time-consuming steps of the VLSI design ?ow. Further, these applications also have different degrees of inherent parallelism in them. We study both control-dominated EDA applications and control plus data parallel EDA applications. We accelerate these applications on these different hardware platforms. We also present an automated approach for accelerating certain uniprocessor applications on a graphics processor. This monograph compares custom ICs, FPGAs, and graphics processing units (GPUs) as potential platforms to accelerate EDA algorithms. It also provides details of the programming model used for interfacing with the GPUs.

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