Floating-Point Architectures for Energy-Efficient Transprecision Computing

The power-wall obstacle fuels a push towards computing paradigms that put energy efficiency as the ultimate figure of merit for any hardware design. Significant advances in research have relaxed the "always maximum precision" approach to standard floating-point usage and exploit approximation more aggressively. The emerging "transprecision computing" paradigm requires fine-grained control over numerical precision to tease out more performance and efficiency from hardware and software. This work develops the concept of flexible transprecision computing for general-purpose systems by following a multi-pronged approach. It explores extensions to the FP type system, the addition of new types and operations to compilation toolchains, processor ISAs, and processor cores while also developing the necessary hardware for a fully configurable transprecision floating-point unit. These developments spawn a range of implementations spanning both the low-power embedded and application-class high-performance domains, delivering improvements in performance and energy efficiency across the board.